1. Field of the Invention
The present invention relates to a semiconductor device and method of manufacture thereof, a circuit board and an electronic instrument.
2. Description of Related Art
As higher mounting density of semiconductor devices is demanded, bare-chip mounting is ideal. However, for bare chips, quality assurance and handling are difficult. In response to this, semiconductor devices have been developed to which Chip Scale/Size Package (CSP) technology is applied. There is no formal definition of CSP, but generally this refers to an IC package in which the package size is the same as or only very slightly larger than the chip size. The development of CSP technology is very important as high-density mounting advances. One prior art publication relating to CSP is International Patent Publication WO95/08856.
According to this, a gap is formed between a substrate having external electrodes and a semiconductor chip, and into this gap resin is injected. This resin is such as to have resilience once cured. By means of this resilient resin, stress (thermal stress) applied to the external electrodes is absorbed. It should be noted that this stress is caused by the difference in coefficient of thermal expansion between the semiconductor device and the circuit board on which the semiconductor device is mounted.
However, the resin injected between the semiconductor chip and the substrate is extremely thin, and for this reason it has not been possible adequately to absorb the thermal stress.
The present invention solves this problem, and has as its object the provision of a semiconductor device and method of manufacture thereof, a circuit board and an electronic instrument such that thermal stress can be effectively absorbed.
(1) According to a first aspect of the present invention, there is provided a semiconductor device comprising:
a semiconductor element having a plurality of electrodes;
a passivation film formed on the semiconductor element in a region avoiding at least a part of each of the electrodes;
a conductive foil provided at a given spacing from the surface on which the passivation film is formed;
external electrodes formed on the conductive foil;
an intermediate layer formed between the passivation film and the conductive foil to support the conductive foil; and
wire electrically connecting the electrodes to the conductive foil;
wherein a depression tapered in a direction from the conductive foil to the passivation film, is formed in the intermediate layer under a part of the conductive foil that includes the connection with the external electrodes.
The term xe2x80x9csemiconductor elementxe2x80x9d relating to the present invention is not restricted to a semiconductor chip, but may also include reference to a wafer form not yet separated into chips. In other words, here a xe2x80x9csemiconductor elementxe2x80x9d may be in any form so long as it is a portion of a base substrate formed of for example silicon on which a circuit is formed, and which can be used once in the separated state, or equally to the same while in the integral state.
According to this aspect of the present invention, the external electrodes are formed on the conductive foil, and the conductive foil is supported by the intermediate layer. A depression is formed in the intermediate layer, and the external electrodes are positioned over the depression. In other words, the external electrodes are not supported directly by the intermediate layer, but rather is floating on the intermediate layer. By this means, since the external electrodes are able to move relatively freely, the stress (thermal stress) generated by the difference in coefficient of thermal expansion with the circuit board can be absorbed.
(2) The depression may be filled with a resin having a Young""s modulus lower than that of the intermediate layer.
In this way, since the space in the depression can be filled, the generation of cracks caused by the expansion of steam when heat is applied, for example during reflow processes, can be prevented.
(3) The wires may be formed on the surface on which the passivation film is formed, and may be positioned on the bottom surface of the intermediate layer depression; and the resin may have a conducting filler added, and may electrically connect the wires to the conductive foil.
(4) The intermediate layer may have a bevel between the electrodes and the conductive foil; and the wires may be formed on the bevel to electrically connect the electrodes to the conductive foil.
(5) The intermediates layer may be formed of a flexible material.
In this way, the intermediate layer itself can also relieve stress.
(6) The conductive foil may have a hole positioned within an opening edge of the depression and avoiding the connection with the external electrodes.
In this way, the conductive foil is more easily deformed, and stress can be absorbed by the conductive foil.
(7) The semiconductor device may further comprise a substrate with a surface on which the conductive foil is formed facing toward the intermediate layer; the substrate may have a penetrating hole over the depression; and the external electrodes may be formed on the conductive foil through the penetrating hole.
By means of this, the conductive foil is covered by the substrate and thus protected.
(8) A substrate formed of a flexible material may be provided between the intermediate layer and the conductive foil; the substrate may have a penetrating hole in a region avoiding above the depression; and the wires and the conductive foil may be electrically connected through the penetrating hole.
(9) The conductive foil and the wires may be formed integrally.
(10) The conductive foil and the wires may be formed separately.
(11) According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
providing a semiconductor element that includes a plurality of electrodes and a passivation film that is formed on a surface of the semiconductor element in a region avoiding at least a part of each of the electrodes;
forming a conductive foil at a given spacing from the surface on which the passivation film is formed, an intermediate layer between the passivation film and the conductive foil to support the conductive foil, and a depression in the intermediate layer in a position to avoid the electrodes;
forming wires that connect electrically the electrodes to the conductive foil; and
forming external electrodes on the conductive foil in a position above the depression.
With a semiconductor device manufactured according to this aspect of the present invention, the external electrodes are formed on the conductive foil, and the conductive foil is supported by the intermediate layer. A depression is formed in the intermediate layer, and the external electrodes are positioned over the depression. In other words, the external electrodes are not supported directly by the intermediate layer, but rather are floating on the intermediate layer. By this means, since the external electrodes are able to move relatively freely, the stress (thermal stress) generated by the difference in coefficient of thermal expansion with the circuit board can be absorbed.
(12) In the method of the present invention, a substrate may be provided, having a penetrating hole, and having the conductive foil adhered to a position including the position over the penetrating hole; the intermediate layer may be formed on the surface on which the passivation film is formed, and the depression may be formed in the intermediate layer; thereafter, the substrate may be mounted on the intermediate layer so that the penetrating hole is positioned over the depression and that the conductive foil is opposed to the depression; and the external electrodes may be formed on the conductive foil through the penetrating hole.
By means of this, sine the conductive foil is adhered to the substrate, the step of forming the conductive foil can be carried out simply.
(13) In the method of the present invention, a substrate formed of a flexible material and having a penetrating hole may be provided; the intermediate layer may be formed on the surface on which the passivation film is formed, the depression may be formed on the intermediate layer, and the wires may be formed on the intermediate layer; and the substrate may be mounted on the intermediate layer with the penetrating hole positioned over the wires, the conductive foil may be formed on the substrate, and the wires and the conductive foil may be electrically connected through the penetrating hole.
By means of this, since the conductive foil is adhered to the substrate, the step of forming the conductive foil can be carried out simply.
(14) The intermediate layer may be formed on the surface on which the passivation film is formed, the conductive foil may be formed on the intermediate layer, a hole may be formed in the conductive foil, and the intermediate layer may be etched through the hole to form the depression.
(15) The intermediate layer may be formed of a material which can be etched under conditions in which the semiconductor element cannot be etched.
In this way, when the intermediate layer is etched, etching of the surface of the semiconductor element can be prevented.
(16) The passivation film may be etched under the etching conditions of the intermediate layer; and
on the passivation film, a covering layer may be formed of a material which is not readily etched under the etching conditions of the intermediate layer, the intermediate layer may be formed on the covering layer, the conductive foil may be formed on the intermediate layer, a hole may be formed in the conductive foil, and the intermediate layer may be etched through the hole to form the depression.
In this way, by the formation of the covering layer on the passivation film, the passivation film is prevented from being etched.
(17) The passivation film may be etched under the etching conditions of the intermediate layer;
on the passivation film, a first covering layer may be formed of a material which is not readily etched under the etching conditions of the intermediate layer;
the intermediate layer may be formed on the first covering layer;
the conductive foil and wires may be formed on the intermediate layer, and a hole may be formed in the conductive foil;
a solder resist layer may be formed on the wires;
on the solder resist layer, a second covering layer may be formed of a material which is not readily etched under the etching conditions of the intermediate layer; and
the intermediate layer ;may be etched as far as the underneath of the conductive foil through the hole in the conductive foil.
(18) The method of the present invention may further comprise, before the step of etching the intermediate layer, a step in which the external electrodes are formed on the conductive foil, and on the external electrodes an electrode covering layer is formed of a material which is not readily etched under the etching conditions of the intermediate layer.
By means of this, after the external electrodes are formed, the depression is formed by etching the intermediate layer. Therefore, since the residue created by the formation of the external electrodes are removed before carrying out etching no residue remains in the depression.
(19) The method of the present invention may further comprise a step in which the depression is filled with a resin having a Young""s modulus lower than that of the intermediate layer.
(20) According to a third aspect of the present invention, there is provided a circuit board on which is mounted the semiconductor device described above.
(21) According to a fourth aspect of the present invention, there is provided an electronic instrument having the circuit board described above.